The VBAR_EL3 characteristics are:
Holds the vector base address for any exception that is taken to EL3.
This register is present only when HaveEL(EL3). Otherwise, direct accesses to VBAR_EL3 are UNDEFINED.
RW fields in this register reset to architecturally UNKNOWN values.
VBAR_EL3 is a 129-bit register.
The VBAR_EL3 bit assignments are:
Vector Base Address. Base address of the exception vectors for exceptions taken to EL3.
If the implementation does not support ARMv8.2-LVA, then:
If the implementation supports ARMv8.2-LVA, then:
Bits [10:0] are treated as 0 for the purpose of calculating the exception vector address.
This field resets to an architecturally UNKNOWN value.
Reserved, RES0.
Vector Base Address. Base address of the exception vectors for exceptions taken to EL3.
If the implementation does not support ARMv8.2-LVA, then:
If the implementation supports ARMv8.2-LVA, then:
This field resets to an architecturally UNKNOWN value.
Reserved, RES0.
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
Vector Base Address | |||||||||||||||||||||||||||||||
Vector Base Address | RES0 | ||||||||||||||||||||||||||||||
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Vector Base Address. Base address of the exception vectors for exceptions taken to EL3.
If the implementation does not support ARMv8.2-LVA, then:
If the implementation supports ARMv8.2-LVA, then:
This field resets to an architecturally UNKNOWN value.
Reserved, RES0.
Accesses to this register use the following encodings:
op0 | op1 | CRn | CRm | op2 |
---|---|---|---|---|
0b11 | 0b110 | 0b1100 | 0b0000 | 0b000 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then UNDEFINED; elsif PSTATE.EL == EL2 then UNDEFINED; elsif PSTATE.EL == EL3 then if IsFeatureImplemented("Morello") && !CapIsSystemAccessEnabled() && !Halted() then AArch64.SystemAccessTrap(EL3, 0x18); else return VBAR_EL3<63:0>;
op0 | op1 | CRn | CRm | op2 |
---|---|---|---|---|
0b11 | 0b110 | 0b1100 | 0b0000 | 0b000 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then UNDEFINED; elsif PSTATE.EL == EL2 then UNDEFINED; elsif PSTATE.EL == EL3 then if IsFeatureImplemented("Morello") && !CapIsSystemAccessEnabled() && !Halted() then AArch64.SystemAccessTrap(EL3, 0x18); else VBAR_EL3 = ZeroExtend(X[t]);
op0 | op1 | CRn | CRm | op2 |
---|---|---|---|---|
0b11 | 0b110 | 0b1100 | 0b0000 | 0b000 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then UNDEFINED; elsif PSTATE.EL == EL2 then UNDEFINED; elsif PSTATE.EL == EL3 then if IsFeatureImplemented("Morello") && !CapIsSystemAccessEnabled() && !Halted() then AArch64.SystemAccessTrap(EL3, 0x2A); elsif CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); else return VBAR_EL3;
op0 | op1 | CRn | CRm | op2 |
---|---|---|---|---|
0b11 | 0b110 | 0b1100 | 0b0000 | 0b000 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then UNDEFINED; elsif PSTATE.EL == EL2 then UNDEFINED; elsif PSTATE.EL == EL3 then if IsFeatureImplemented("Morello") && !CapIsSystemAccessEnabled() && !Halted() then AArch64.SystemAccessTrap(EL3, 0x2A); elsif CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); else VBAR_EL3 = C[t];
12/01/2022 09:56; 05a4944b4b04e7ab50def8c126b479d22136f35b
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