OSLSR_EL1, OS Lock Status Register

The OSLSR_EL1 characteristics are:

Purpose

Provides the status of the OS Lock.

Configuration

AArch64 System register OSLSR_EL1 bits [31:0] are architecturally mapped to AArch32 System register DBGOSLSR[31:0] .

Some or all RW fields of this register have defined reset values. These apply only if the PE resets into an Exception level that is using AArch64. Otherwise, RW fields in this register reset to architecturally UNKNOWN values.

Attributes

OSLSR_EL1 is a 64-bit register.

Field descriptions

The OSLSR_EL1 bit assignments are:

6362616059585756555453525150494847464544434241403938373635343332
RES0
RES0OSLM[1]nTTOSLKOSLM[0]
313029282726252423222120191817161514131211109876543210

Bits [63:4]

Reserved, RES0.

OSLM[1], bit [3]

This field is bit[1] of OSLM[1:0].

OS lock model implemented. Identifies the form of OS save and restore mechanism implemented.

OSLMMeaning
0b00

OS Lock not implemented.

0b10

OS Lock implemented.

All other values are reserved. In an Armv8 implementation the value 0b00 is not permitted.

The OSLM field is split as follows:

nTT, bit [2]

Not 32-bit access. This bit is always RAZ. It indicates that a 32-bit access is needed to write the key to the OS Lock Access Register.

OSLK, bit [1]

OS Lock Status.

OSLKMeaning
0b0

OS Lock unlocked.

0b1

OS Lock locked.

The OS Lock is locked and unlocked by writing to the OS Lock Access Register.

The following resets apply:

OSLM[0], bit [0]

This field is bit[0] of OSLM[1:0].

See OSLM[1] for the field description.

Accessing the OSLSR_EL1

Accesses to this register use the following encodings:

MRS <Xt>, OSLSR_EL1

op0op1CRnCRmop2
0b100b0000b00010b00010b100

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if IsFeatureImplemented("Morello") && !CapIsSystemAccessEnabled() && !Halted() then if TargetELForCapabilityExceptions() == EL1 then AArch64.SystemAccessTrap(EL1, 0x18); elsif TargetELForCapabilityExceptions() == EL2 then AArch64.SystemAccessTrap(EL2, 0x18); else AArch64.SystemAccessTrap(EL3, 0x18); elsif EL2Enabled() && !ELUsingAArch32(EL2) && MDCR_EL2.<TDE,TDOSA> != '00' then AArch64.SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TDOSA == '1' then AArch64.SystemAccessTrap(EL3, 0x18); else return OSLSR_EL1; elsif PSTATE.EL == EL2 then if IsFeatureImplemented("Morello") && !CapIsSystemAccessEnabled() && !Halted() then if TargetELForCapabilityExceptions() == EL2 then AArch64.SystemAccessTrap(EL2, 0x18); else AArch64.SystemAccessTrap(EL3, 0x18); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TDOSA == '1' then AArch64.SystemAccessTrap(EL3, 0x18); else return OSLSR_EL1; elsif PSTATE.EL == EL3 then if IsFeatureImplemented("Morello") && !CapIsSystemAccessEnabled() && !Halted() then AArch64.SystemAccessTrap(EL3, 0x18); else return OSLSR_EL1;




12/01/2022 09:56; 05a4944b4b04e7ab50def8c126b479d22136f35b

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