TPIDR_EL1, EL1 Software Thread ID Register

The TPIDR_EL1 characteristics are:

Purpose

Provides a location where software executing at EL1 can store thread identifying information, for OS management purposes.

The PE makes no use of this register.

Configuration

AArch64 System register TPIDR_EL1 bits [31:0] are architecturally mapped to AArch32 System register TPIDRPRW[31:0] .

RW fields in this register reset to architecturally UNKNOWN values.

Attributes

TPIDR_EL1 is a 129-bit register.

Field descriptions

The TPIDR_EL1 bit assignments are:

When Morello is implemented:

Bits [128:0]

Thread ID. Thread identifying information stored by software running at this Exception level

This field resets to an architecturally UNKNOWN value.

When Morello is not implemented:

6362616059585756555453525150494847464544434241403938373635343332
Thread ID
Thread ID
313029282726252423222120191817161514131211109876543210

Bits [63:0]

Thread ID. Thread identifying information stored by software running at this Exception level.

This field resets to an architecturally UNKNOWN value.

Accessing the TPIDR_EL1

Accesses to this register use the following encodings:

MRS <Xt>, TPIDR_EL1

op0op1CRnCRmop2
0b110b0000b11010b00000b100

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if IsFeatureImplemented("Morello") && IsInRestricted() && !Halted() then return RTPIDR_EL0<63:0>; else return TPIDR_EL1<63:0>; elsif PSTATE.EL == EL2 then return TPIDR_EL1<63:0>; elsif PSTATE.EL == EL3 then return TPIDR_EL1<63:0>;

MSR TPIDR_EL1, <Xt>

op0op1CRnCRmop2
0b110b0000b11010b00000b100

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if IsFeatureImplemented("Morello") && IsInRestricted() && !Halted() then RTPIDR_EL0 = ZeroExtend(X[t]); else TPIDR_EL1 = ZeroExtend(X[t]); elsif PSTATE.EL == EL2 then TPIDR_EL1 = ZeroExtend(X[t]); elsif PSTATE.EL == EL3 then TPIDR_EL1 = ZeroExtend(X[t]);

MRS <Ct>, CTPIDR_EL1

op0op1CRnCRmop2
0b110b0000b11010b00000b100

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if CPACR_EL1.CEN == 'x0' then AArch64.SystemAccessTrap(EL1, 0x29); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.E2H != '1' && CPTR_EL2.TC == '1' then AArch64.SystemAccessTrap(EL2, 0x29); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.E2H == '1' && CPTR_EL2.CEN == 'x0' then AArch64.SystemAccessTrap(EL2, 0x29); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); elsif IsFeatureImplemented("Morello") && IsInRestricted() && !Halted() then return RTPIDR_EL0; else return TPIDR_EL1; elsif PSTATE.EL == EL2 then if HCR_EL2.E2H == '0' && CPTR_EL2.TC == '1' then AArch64.SystemAccessTrap(EL2, 0x29); elsif HCR_EL2.E2H == '1' && CPTR_EL2.CEN == 'x0' then AArch64.SystemAccessTrap(EL2, 0x29); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); else return TPIDR_EL1; elsif PSTATE.EL == EL3 then if CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); else return TPIDR_EL1;

MSR CTPIDR_EL1, <Ct>

op0op1CRnCRmop2
0b110b0000b11010b00000b100

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if CPACR_EL1.CEN == 'x0' then AArch64.SystemAccessTrap(EL1, 0x29); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.E2H != '1' && CPTR_EL2.TC == '1' then AArch64.SystemAccessTrap(EL2, 0x29); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.E2H == '1' && CPTR_EL2.CEN == 'x0' then AArch64.SystemAccessTrap(EL2, 0x29); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); elsif IsFeatureImplemented("Morello") && IsInRestricted() && !Halted() then RTPIDR_EL0 = C[t]; else TPIDR_EL1 = C[t]; elsif PSTATE.EL == EL2 then if HCR_EL2.E2H == '0' && CPTR_EL2.TC == '1' then AArch64.SystemAccessTrap(EL2, 0x29); elsif HCR_EL2.E2H == '1' && CPTR_EL2.CEN == 'x0' then AArch64.SystemAccessTrap(EL2, 0x29); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); else TPIDR_EL1 = C[t]; elsif PSTATE.EL == EL3 then if CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); else TPIDR_EL1 = C[t];




12/01/2022 09:56; 05a4944b4b04e7ab50def8c126b479d22136f35b

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