TPIDR_EL3, EL3 Software Thread ID Register

The TPIDR_EL3 characteristics are:

Purpose

Provides a location where software executing at EL3 can store thread identifying information, for OS management purposes.

The PE makes no use of this register.

Configuration

This register is present only when HaveEL(EL3). Otherwise, direct accesses to TPIDR_EL3 are UNDEFINED.

RW fields in this register reset to architecturally UNKNOWN values.

Attributes

TPIDR_EL3 is a 129-bit register.

Field descriptions

The TPIDR_EL3 bit assignments are:

When Morello is implemented:

Bits [128:0]

Thread ID. Thread identifying information stored by software running at this Exception level

This field resets to an architecturally UNKNOWN value.

When Morello is not implemented:

6362616059585756555453525150494847464544434241403938373635343332
Thread ID
Thread ID
313029282726252423222120191817161514131211109876543210

Bits [63:0]

Thread ID. Thread identifying information stored by software running at this Exception level.

This field resets to an architecturally UNKNOWN value.

Accessing the TPIDR_EL3

Accesses to this register use the following encodings:

MRS <Xt>, TPIDR_EL3

op0op1CRnCRmop2
0b110b1100b11010b00000b010

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then UNDEFINED; elsif PSTATE.EL == EL2 then UNDEFINED; elsif PSTATE.EL == EL3 then if IsFeatureImplemented("Morello") && IsInRestricted() && !Halted() then return RTPIDR_EL0<63:0>; else return TPIDR_EL3<63:0>;

MSR TPIDR_EL3, <Xt>

op0op1CRnCRmop2
0b110b1100b11010b00000b010

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then UNDEFINED; elsif PSTATE.EL == EL2 then UNDEFINED; elsif PSTATE.EL == EL3 then if IsFeatureImplemented("Morello") && IsInRestricted() && !Halted() then RTPIDR_EL0 = ZeroExtend(X[t]); else TPIDR_EL3 = ZeroExtend(X[t]);

MRS <Ct>, CTPIDR_EL3

op0op1CRnCRmop2
0b110b1100b11010b00000b010

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then UNDEFINED; elsif PSTATE.EL == EL2 then UNDEFINED; elsif PSTATE.EL == EL3 then if CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); elsif IsFeatureImplemented("Morello") && IsInRestricted() && !Halted() then return RTPIDR_EL0; else return TPIDR_EL3;

MSR CTPIDR_EL3, <Ct>

op0op1CRnCRmop2
0b110b1100b11010b00000b010

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then UNDEFINED; elsif PSTATE.EL == EL2 then UNDEFINED; elsif PSTATE.EL == EL3 then if CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); elsif IsFeatureImplemented("Morello") && IsInRestricted() && !Halted() then RTPIDR_EL0 = C[t]; else TPIDR_EL3 = C[t];




12/01/2022 09:56; 05a4944b4b04e7ab50def8c126b479d22136f35b

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