TLBI ASIDE1, TLB Invalidate by ASID, EL1

The TLBI ASIDE1 characteristics are:

Purpose

Invalidates cached copies of translation table entries from TLBs that meet all the following requirements:

The invalidation applies to the PE that executes this System instruction.

Configuration

Attributes

TLBI ASIDE1 is a 64-bit System instruction.

Field descriptions

The TLBI ASIDE1 input value bit assignments are:

6362616059585756555453525150494847464544434241403938373635343332
ASIDRES0
RES0
313029282726252423222120191817161514131211109876543210

ASID, bits [63:48]

ASID value to match. Any appropriate TLB entries that match the ASID values will be affected by this System instruction.

If the implementation supports 16 bits of ASID, but only 8 bits are being used in the context being invalidated, the upper bits are RES0.

Bits [47:0]

Reserved, RES0.

Executing the TLBI ASIDE1 instruction

Accesses to this instruction use the following encodings:

TLBI ASIDE1{, <Xt>}

op0op1CRnCRmop2
0b010b0000b10000b01110b010

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if IsFeatureImplemented("Morello") && !CapIsSystemAccessEnabled() && !Halted() then if TargetELForCapabilityExceptions() == EL1 then AArch64.SystemAccessTrap(EL1, 0x18); elsif TargetELForCapabilityExceptions() == EL2 then AArch64.SystemAccessTrap(EL2, 0x18); else AArch64.SystemAccessTrap(EL3, 0x18); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TTLB == '1' then AArch64.SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.FB == '1' then TLBI_ASIDE1IS(R[t]); else TLBI_ASIDE1(R[t]); elsif PSTATE.EL == EL2 then if IsFeatureImplemented("Morello") && !CapIsSystemAccessEnabled() && !Halted() then if TargetELForCapabilityExceptions() == EL2 then AArch64.SystemAccessTrap(EL2, 0x18); else AArch64.SystemAccessTrap(EL3, 0x18); else TLBI_ASIDE1(R[t]); elsif PSTATE.EL == EL3 then if IsFeatureImplemented("Morello") && !CapIsSystemAccessEnabled() && !Halted() then AArch64.SystemAccessTrap(EL3, 0x18); else TLBI_ASIDE1(R[t]);




12/01/2022 09:56; 05a4944b4b04e7ab50def8c126b479d22136f35b

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