PAN, Privileged Access Never

The PAN characteristics are:

Purpose

Allows access to the Privileged Access Never bit.

Configuration

This register is present only when ARMv8.1-PAN is implemented. Otherwise, direct accesses to PAN are UNDEFINED.

Attributes

PAN is a 64-bit register.

Field descriptions

The PAN bit assignments are:

6362616059585756555453525150494847464544434241403938373635343332
RES0
RES0PANRES0
313029282726252423222120191817161514131211109876543210

Bits [63:23]

Reserved, RES0.

PAN, bit [22]

Privileged Access Never.

PANMeaning
0b0

Privileged reads and write are not disabled by this mechanism.

0b1

Disables privileged read and write accesses to addresses accessible at EL0 for an enabled stage 1 translation regime that defines the EL0 permissions.

The value of this bit is usually preserved on taking an exception, except in the following situations:

Bits [21:0]

Reserved, RES0.

Accessing the PAN

For details on the operation of the MSR (immediate) accessor, see MSR (immediate) in the Arm® Architecture Reference Manual, Armv8, for Armv8-A architecture profile.

Accesses to this register use the following encodings:

MRS <Xt>, PAN

op0op1CRnCRmop2
0b110b0000b01000b00100b011

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then return Zeros(41):PSTATE.PAN:Zeros(22); elsif PSTATE.EL == EL2 then return Zeros(41):PSTATE.PAN:Zeros(22); elsif PSTATE.EL == EL3 then return Zeros(41):PSTATE.PAN:Zeros(22);

MSR PAN, <Xt>

op0op1CRnCRmop2
0b110b0000b01000b00100b011

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then PSTATE.PAN = X[t]<22>; elsif PSTATE.EL == EL2 then PSTATE.PAN = X[t]<22>; elsif PSTATE.EL == EL3 then PSTATE.PAN = X[t]<22>;

MSR PAN, #<imm>

op0op1CRnop2
0b000b0000b01000b100



12/01/2022 09:56; 05a4944b4b04e7ab50def8c126b479d22136f35b

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