RDDC_EL0, Restricted Default Data Capability

The RDDC_EL0 characteristics are:

Purpose

Holds the default data capability associated when the PE is in Restricted

Configuration

This register is present only when Morello is implemented. Otherwise, direct accesses to RDDC_EL0 are UNDEFINED.

Some or all RW fields of this register have defined reset values. These apply only if the PE resets into an Exception level that is using AArch64. Otherwise, RW fields in this register reset to architecturally UNKNOWN values.

Attributes

RDDC_EL0 is a 129-bit register.

Field descriptions

The RDDC_EL0 bit assignments are:

Bits [128:0]

Restricted Default Data Capability.

This field resets to 680563435767663502237895417237176582144.

Accessing the RDDC_EL0

Accesses to this register use the following encodings:

MRS <Ct>, RDDC_EL0

op0op1CRnCRmop2
0b110b0110b01000b00110b001

if PSTATE.EL == EL0 then if IsFeatureImplemented("Morello") && IsInRestricted() && !Halted() then UNDEFINED; elsif !ELUsingAArch32(EL1) && !(EL2Enabled() && HCR_EL2.<E2H,TGE> == '11') && CPACR_EL1.CEN != '11' then if EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TGE == '1' then AArch64.SystemAccessTrap(EL2, 0x29); else AArch64.SystemAccessTrap(EL1, 0x29); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.<E2H,TGE> == '11' && CPTR_EL2.CEN != '11' then AArch64.SystemAccessTrap(EL2, 0x29); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.E2H == '1' && CPTR_EL2.CEN == 'x0' then AArch64.SystemAccessTrap(EL2, 0x29); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.E2H != '1' && CPTR_EL2.TC == '1' then AArch64.SystemAccessTrap(EL2, 0x29); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); else return RDDC_EL0; elsif PSTATE.EL == EL1 then if IsFeatureImplemented("Morello") && IsInRestricted() && !Halted() then UNDEFINED; elsif CPACR_EL1.CEN == 'x0' then AArch64.SystemAccessTrap(EL1, 0x29); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.E2H != '1' && CPTR_EL2.TC == '1' then AArch64.SystemAccessTrap(EL2, 0x29); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.E2H == '1' && CPTR_EL2.CEN == 'x0' then AArch64.SystemAccessTrap(EL2, 0x29); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); else return RDDC_EL0; elsif PSTATE.EL == EL2 then if IsFeatureImplemented("Morello") && IsInRestricted() && !Halted() then UNDEFINED; elsif HCR_EL2.E2H == '0' && CPTR_EL2.TC == '1' then AArch64.SystemAccessTrap(EL2, 0x29); elsif HCR_EL2.E2H == '1' && CPTR_EL2.CEN == 'x0' then AArch64.SystemAccessTrap(EL2, 0x29); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); else return RDDC_EL0; elsif PSTATE.EL == EL3 then if IsFeatureImplemented("Morello") && IsInRestricted() && !Halted() then UNDEFINED; elsif CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); else return RDDC_EL0;

MSR RDDC_EL0, <Ct>

op0op1CRnCRmop2
0b110b0110b01000b00110b001

if PSTATE.EL == EL0 then if IsFeatureImplemented("Morello") && IsInRestricted() && !Halted() then UNDEFINED; elsif !ELUsingAArch32(EL1) && !(EL2Enabled() && HCR_EL2.<E2H,TGE> == '11') && CPACR_EL1.CEN != '11' then if EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TGE == '1' then AArch64.SystemAccessTrap(EL2, 0x29); else AArch64.SystemAccessTrap(EL1, 0x29); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.<E2H,TGE> == '11' && CPTR_EL2.CEN != '11' then AArch64.SystemAccessTrap(EL2, 0x29); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.E2H == '1' && CPTR_EL2.CEN == 'x0' then AArch64.SystemAccessTrap(EL2, 0x29); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.E2H != '1' && CPTR_EL2.TC == '1' then AArch64.SystemAccessTrap(EL2, 0x29); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); else RDDC_EL0 = C[t]; elsif PSTATE.EL == EL1 then if IsFeatureImplemented("Morello") && IsInRestricted() && !Halted() then UNDEFINED; elsif CPACR_EL1.CEN == 'x0' then AArch64.SystemAccessTrap(EL1, 0x29); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.E2H != '1' && CPTR_EL2.TC == '1' then AArch64.SystemAccessTrap(EL2, 0x29); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.E2H == '1' && CPTR_EL2.CEN == 'x0' then AArch64.SystemAccessTrap(EL2, 0x29); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); else RDDC_EL0 = C[t]; elsif PSTATE.EL == EL2 then if IsFeatureImplemented("Morello") && IsInRestricted() && !Halted() then UNDEFINED; elsif HCR_EL2.E2H == '0' && CPTR_EL2.TC == '1' then AArch64.SystemAccessTrap(EL2, 0x29); elsif HCR_EL2.E2H == '1' && CPTR_EL2.CEN == 'x0' then AArch64.SystemAccessTrap(EL2, 0x29); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); else RDDC_EL0 = C[t]; elsif PSTATE.EL == EL3 then if IsFeatureImplemented("Morello") && IsInRestricted() && !Halted() then UNDEFINED; elsif CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); else RDDC_EL0 = C[t];

MRS <Ct>, DDC

op0op1CRnCRmop2
0b110b0110b01000b00010b001

if PSTATE.EL == EL0 && !ELUsingAArch32(EL1) && !(EL2Enabled() && HCR_EL2.<E2H,TGE> == '11') && CPACR_EL1.CEN != '11' then if EL2Enabled() && HCR_EL2.TGE == '1' then AArch64.SystemAccessTrap(EL2, 0x29); else AArch64.SystemAccessTrap(EL1, 0x29); elsif PSTATE.EL == EL1 && CPACR_EL1.CEN == 'x0' then AArch64.SystemAccessTrap(EL1, 0x29); elsif PSTATE.EL IN {EL1, EL2, EL0} && EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.<E2H,TGE> == '11' && CPTR_EL2.CEN != '11' then AArch64.SystemAccessTrap(EL2, 0x29); elsif PSTATE.EL IN {EL1, EL2, EL0} && EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.E2H == '1' && CPTR_EL2.CEN == 'x0' then AArch64.SystemAccessTrap(EL2, 0x29); elsif PSTATE.EL IN {EL1, EL2, EL0} && EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.E2H != '1' && CPTR_EL2.TC == '1' then AArch64.SystemAccessTrap(EL2, 0x29); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); elsif IsInRestricted() then return RDDC_EL0; elsif PSTATE.SP == '0' then return DDC_EL0; elsif PSTATE.EL == EL0 then return DDC_EL0; elsif PSTATE.EL == EL1 then return DDC_EL1; elsif PSTATE.EL == EL2 then return DDC_EL2; elsif PSTATE.EL == EL3 then return DDC_EL3;

MSR DDC, <Ct>

op0op1CRnCRmop2
0b110b0110b01000b00010b001

if PSTATE.EL == EL0 && !ELUsingAArch32(EL1) && !(EL2Enabled() && HCR_EL2.<E2H,TGE> == '11') && CPACR_EL1.CEN != '11' then if EL2Enabled() && HCR_EL2.TGE == '1' then AArch64.SystemAccessTrap(EL2, 0x29); else AArch64.SystemAccessTrap(EL1, 0x29); elsif PSTATE.EL == EL1 && CPACR_EL1.CEN == 'x0' then AArch64.SystemAccessTrap(EL1, 0x29); elsif PSTATE.EL IN {EL1, EL2, EL0} && EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.<E2H,TGE> == '11' && CPTR_EL2.CEN != '11' then AArch64.SystemAccessTrap(EL2, 0x29); elsif PSTATE.EL IN {EL1, EL2, EL0} && EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.E2H == '1' && CPTR_EL2.CEN == 'x0' then AArch64.SystemAccessTrap(EL2, 0x29); elsif PSTATE.EL IN {EL1, EL2, EL0} && EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.E2H != '1' && CPTR_EL2.TC == '1' then AArch64.SystemAccessTrap(EL2, 0x29); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); elsif IsInRestricted() then RDDC_EL0 = C[t]; elsif PSTATE.SP == '0' then DDC_EL0 = C[t]; elsif PSTATE.EL == EL0 then DDC_EL0 = C[t]; elsif PSTATE.EL == EL1 then DDC_EL1 = C[t]; elsif PSTATE.EL == EL2 then DDC_EL2 = C[t]; elsif PSTATE.EL == EL3 then DDC_EL3 = C[t];




12/01/2022 09:56; 05a4944b4b04e7ab50def8c126b479d22136f35b

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