ELR_EL1, Exception Link Register (EL1)

The ELR_EL1 characteristics are:

Purpose

When taking an exception to EL1, holds the address to return to.

Configuration

RW fields in this register reset to architecturally UNKNOWN values.

Attributes

ELR_EL1 is a 129-bit register.

Field descriptions

The ELR_EL1 bit assignments are:

When Morello is implemented and Capability access at EL1 is not trapped:

Bits [128:0]

Return address.

An exception return from EL1 using AArch64 makes ELR_EL1 become UNKNOWN.

This field resets to an architecturally UNKNOWN value.

When Morello is implemented and Capability access at EL1 is trapped:

Bits [128:64]

Reserved, RES0.

Bits [63:0]

Return address.

An exception return from EL1 using AArch64 makes ELR_EL1 become UNKNOWN.

This field resets to an architecturally UNKNOWN value.

When Morello is not implemented:

6362616059585756555453525150494847464544434241403938373635343332
Return address
Return address
313029282726252423222120191817161514131211109876543210

Bits [63:0]

Return address.

An exception return from EL1 using AArch64 makes ELR_EL1 become UNKNOWN.

This field resets to an architecturally UNKNOWN value.

Accessing the ELR_EL1

When HCR_EL2.E2H is 1, without explicit synchronization, access from EL3 using the mnemonic ELR_EL1 or ELR_EL12 are not guaranteed to be ordered with respect to accesses using the other mnemonic.

Accesses to this register use the following encodings:

MRS <Xt>, ELR_EL1

op0op1CRnCRmop2
0b110b0000b01000b00000b001

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then return ELR_EL1<63:0>; elsif PSTATE.EL == EL2 then if HCR_EL2.E2H == '1' then return ELR_EL2<63:0>; else return ELR_EL1<63:0>; elsif PSTATE.EL == EL3 then return ELR_EL1<63:0>;

MSR ELR_EL1, <Xt>

op0op1CRnCRmop2
0b110b0000b01000b00000b001

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then ELR_EL1 = ZeroExtend(X[t]); elsif PSTATE.EL == EL2 then if HCR_EL2.E2H == '1' then ELR_EL2 = ZeroExtend(X[t]); else ELR_EL1 = ZeroExtend(X[t]); elsif PSTATE.EL == EL3 then ELR_EL1 = ZeroExtend(X[t]);

MRS <Xt>, ELR_EL12

op0op1CRnCRmop2
0b110b1010b01000b00000b001

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then UNDEFINED; elsif PSTATE.EL == EL2 then if HCR_EL2.E2H == '1' then return ELR_EL1<63:0>; else UNDEFINED; elsif PSTATE.EL == EL3 then if EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.E2H == '1' then return ELR_EL1<63:0>; else UNDEFINED;

MSR ELR_EL12, <Xt>

op0op1CRnCRmop2
0b110b1010b01000b00000b001

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then UNDEFINED; elsif PSTATE.EL == EL2 then if HCR_EL2.E2H == '1' then ELR_EL1 = ZeroExtend(X[t]); else UNDEFINED; elsif PSTATE.EL == EL3 then if EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.E2H == '1' then ELR_EL1 = ZeroExtend(X[t]); else UNDEFINED;

MRS <Ct>, CELR_EL1

op0op1CRnCRmop2
0b110b0000b01000b00000b001

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if CPACR_EL1.CEN == 'x0' then AArch64.SystemAccessTrap(EL1, 0x29); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.E2H != '1' && CPTR_EL2.TC == '1' then AArch64.SystemAccessTrap(EL2, 0x29); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.E2H == '1' && CPTR_EL2.CEN == 'x0' then AArch64.SystemAccessTrap(EL2, 0x29); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); else return ELR_EL1; elsif PSTATE.EL == EL2 then if HCR_EL2.E2H == '0' && CPTR_EL2.TC == '1' then AArch64.SystemAccessTrap(EL2, 0x29); elsif HCR_EL2.E2H == '1' && CPTR_EL2.CEN == 'x0' then AArch64.SystemAccessTrap(EL2, 0x29); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); elsif HCR_EL2.E2H == '1' then return ELR_EL2; else return ELR_EL1; elsif PSTATE.EL == EL3 then if CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); else return ELR_EL1;

MSR CELR_EL1, <Ct>

op0op1CRnCRmop2
0b110b0000b01000b00000b001

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if CPACR_EL1.CEN == 'x0' then AArch64.SystemAccessTrap(EL1, 0x29); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.E2H != '1' && CPTR_EL2.TC == '1' then AArch64.SystemAccessTrap(EL2, 0x29); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.E2H == '1' && CPTR_EL2.CEN == 'x0' then AArch64.SystemAccessTrap(EL2, 0x29); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); else ELR_EL1 = C[t]; elsif PSTATE.EL == EL2 then if HCR_EL2.E2H == '0' && CPTR_EL2.TC == '1' then AArch64.SystemAccessTrap(EL2, 0x29); elsif HCR_EL2.E2H == '1' && CPTR_EL2.CEN == 'x0' then AArch64.SystemAccessTrap(EL2, 0x29); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); elsif HCR_EL2.E2H == '1' then ELR_EL2 = C[t]; else ELR_EL1 = C[t]; elsif PSTATE.EL == EL3 then if CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); else ELR_EL1 = C[t];

MRS <Ct>, CELR_EL12

op0op1CRnCRmop2
0b110b1010b01000b00000b001

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then UNDEFINED; elsif PSTATE.EL == EL2 then if HCR_EL2.E2H == '1' then if HCR_EL2.E2H == '1' && CPTR_EL2.CEN == 'x0' then AArch64.SystemAccessTrap(EL2, 0x29); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); else return ELR_EL1; else UNDEFINED; elsif PSTATE.EL == EL3 then if EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.E2H == '1' then if CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); else return ELR_EL1; else UNDEFINED;

MSR CELR_EL12, <Ct>

op0op1CRnCRmop2
0b110b1010b01000b00000b001

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then UNDEFINED; elsif PSTATE.EL == EL2 then if HCR_EL2.E2H == '1' then if HCR_EL2.E2H == '1' && CPTR_EL2.CEN == 'x0' then AArch64.SystemAccessTrap(EL2, 0x29); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); else ELR_EL1 = C[t]; else UNDEFINED; elsif PSTATE.EL == EL3 then if EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.E2H == '1' then if CPTR_EL3.EC == '0' then AArch64.SystemAccessTrap(EL3, 0x29); else ELR_EL1 = C[t]; else UNDEFINED;




12/01/2022 09:56; 05a4944b4b04e7ab50def8c126b479d22136f35b

Copyright © 2010-2022 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.