_mm_fixupimm_ps
Classification
AVX-512, Miscellaneous, CPUID Test: AVX512F
Header File
Instruction
VFIXUPIMMPS xmm, xmm, xmm, imm8
Synopsis
_mm_fixupimm_ps(__m128 a, __m128 b, __m128i c, int imm8);
Description
Fix up packed single-precision (32-bit) floating-point elements in "a" and "b" using packed 32-bit integers in "c", and store the results in "dst". "imm8" is used to set the required flags reporting.
Operation
enum TOKEN_TYPE {
QNAN_TOKEN := 0, \
SNAN_TOKEN := 1, \
ZERO_VALUE_TOKEN := 2, \
ONE_VALUE_TOKEN := 3, \
NEG_INF_TOKEN := 4, \
POS_INF_TOKEN := 5, \
NEG_VALUE_TOKEN := 6, \
POS_VALUE_TOKEN := 7
}
DEFINE FIXUPIMMPD(src1[31:0], src2[31:0], src3[31:0], imm8[7:0]) {
tsrc[31:0] := ((src2[30:23] == 0) AND (MXCSR.DAZ == 1)) ? 0.0 : src2[31:0]
CASE(tsrc[31:0]) OF
QNAN_TOKEN:j := 0
SNAN_TOKEN:j := 1
ZERO_VALUE_TOKEN: j := 2
ONE_VALUE_TOKEN: j := 3
NEG_INF_TOKEN: j := 4
POS_INF_TOKEN: j := 5
NEG_VALUE_TOKEN: j := 6
POS_VALUE_TOKEN: j := 7
ESAC
token_response[3:0] := src3[3+4*j:4*j]
CASE(token_response[3:0]) OF
0 : dest[31:0] := src1[31:0]
1 : dest[31:0] := tsrc[31:0]
2 : dest[31:0] := QNaN(tsrc[31:0])
3 : dest[31:0] := QNAN_Indefinite
4 : dest[31:0] := -INF
5 : dest[31:0] := +INF
6 : dest[31:0] := tsrc.sign? -INF : +INF
7 : dest[31:0] := -0
8 : dest[31:0] := +0
9 : dest[31:0] := -1
10: dest[31:0] := +1
11: dest[31:0] := 1/2
12: dest[31:0] := 90.0
13: dest[31:0] := PI/2
14: dest[31:0] := MAX_FLOAT
15: dest[31:0] := -MAX_FLOAT
ESAC
CASE(tsrc[31:0]) OF
ZERO_VALUE_TOKEN:
IF (imm8[0]) #ZE; FI
ZERO_VALUE_TOKEN:
IF (imm8[1]) #IE; FI
ONE_VALUE_TOKEN:
IF (imm8[2]) #ZE; FI
ONE_VALUE_TOKEN:
IF (imm8[3]) #IE; FI
SNAN_TOKEN:
IF (imm8[4]) #IE; FI
NEG_INF_TOKEN:
IF (imm8[5]) #IE; FI
NEG_VALUE_TOKEN:
IF (imm8[6]) #IE; FI
POS_INF_TOKEN:
IF (imm8[7]) #IE; FI
ESAC
RETURN dest[31:0]
}
FOR j := 0 to 3
i := j*32
dst[i+31:i] := FIXUPIMMPD(a[i+31:i], b[i+31:i], c[i+31:i], imm8[7:0])
ENDFOR
dst[MAX:128] := 0