_mm512_mask_shuffle_f64x2
Classification
AVX-512, Swizzle, CPUID Test: AVX512F
Header File
Instruction
VSHUFF64X2 zmm {k}, zmm, zmm, imm8
Synopsis
_mm512_mask_shuffle_f64x2(__m512d src, __mmask8 k, __m512d a, __m512d b, const int imm8);
Description
Shuffle 128-bits (composed of 2 double-precision (64-bit) floating-point elements) selected by "imm8" from "a" and "b", and store the results in "dst" using writemask "k" (elements are copied from "src" when the corresponding mask bit is not set).
Operation
DEFINE SELECT4(src, control) {
CASE(control[1:0]) OF
0: tmp[127:0] := src[127:0]
1: tmp[127:0] := src[255:128]
2: tmp[127:0] := src[383:256]
3: tmp[127:0] := src[511:384]
ESAC
RETURN tmp[127:0]
}
tmp_dst[127:0] := SELECT4(a[511:0], imm8[1:0])
tmp_dst[255:128] := SELECT4(a[511:0], imm8[3:2])
tmp_dst[383:256] := SELECT4(b[511:0], imm8[5:4])
tmp_dst[511:384] := SELECT4(b[511:0], imm8[7:6])
FOR j := 0 to 7
i := j*64
IF k[j]
dst[i+63:i] := tmp_dst[i+63:i]
ELSE
dst[i+63:i] := src[i+63:i]
FI
ENDFOR
dst[MAX:512] := 0