_mm_maskz_range_sd
Classification
AVX-512, Miscellaneous, CPUID Test: AVX512DQ
Header File
Instruction
VRANGESD xmm {z}, xmm, xmm, imm8
Synopsis
_mm_maskz_range_sd(__mmask8 k, __m128d a, __m128d b, int imm8);
Description
Calculate the max, min, absolute max, or absolute min (depending on control in "imm8") for the lower double-precision (64-bit) floating-point element in "a" and "b", store the result in the lower element of "dst" using zeromask "k" (the element is zeroed out when mask bit 0 is not set), and copy the upper element from "a" to the upper element of "dst".
imm8[1:0] specifies the operation control: 00 = min, 01 = max, 10 = absolute max, 11 = absolute min.
imm8[3:2] specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit.
Operation
DEFINE RANGE(src1[63:0], src2[63:0], opCtl[1:0], signSelCtl[1:0]) {
CASE opCtl[1:0] OF
0: tmp[63:0] := (src1[63:0] <= src2[63:0]) ? src1[63:0] : src2[63:0]
1: tmp[63:0] := (src1[63:0] <= src2[63:0]) ? src2[63:0] : src1[63:0]
2: tmp[63:0] := (ABS(src1[63:0]) <= ABS(src2[63:0])) ? src1[63:0] : src2[63:0]
3: tmp[63:0] := (ABS(src1[63:0]) <= ABS(src2[63:0])) ? src2[63:0] : src1[63:0]
ESAC
CASE signSelCtl[1:0] OF
0: dst[63:0] := (src1[63] << 63) OR (tmp[62:0])
1: dst[63:0] := tmp[63:0]
2: dst[63:0] := (0 << 63) OR (tmp[62:0])
3: dst[63:0] := (1 << 63) OR (tmp[62:0])
ESAC
RETURN dst
}
IF k[0]
dst[63:0] := RANGE(a[63:0], b[63:0], imm8[1:0], imm8[3:2])
ELSE
dst[63:0] := 0
FI
dst[127:64] := a[127:64]
dst[MAX:128] := 0