__tile_stream_loadd
Classification
AMX, Application-Targeted, CPUID Test: AMX-TILE
Header File
Instruction
TILELOADDT1 tmm, sibmem
Synopsis
__tile_stream_loadd(__tile1024i* dst, const void* base, size_t stride);
Description
Load tile rows from memory specifieid by "base" address and "stride" into destination tile "dst". This intrinsic provides a hint to the implementation that the data will likely not be reused in the near future and the data caching can be optimized accordingly. The shape of tile is specified in the struct of __tile1024i. The register of the tile is allocated by compiler.
Operation
start := tileconfig.startRow
IF start == 0 // not restarting, zero incoming state
tilezero(dst)
FI
nbytes := dst.colsb
DO WHILE start < dst.rows
memptr := base + start * stride
write_row_and_zero(dst, start, read_memory(memptr, nbytes), nbytes)
start := start + 1
OD
zero_upper_rows(dst, dst.rows)
zero_tileconfig_start()