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RP2040.h
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/*************************************************************************/
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/*
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* Copyright (c) 2009-2021 Arm Limited. All rights reserved.
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* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _CMSIS_RP2040_H_
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#define _CMSIS_RP2040_H_
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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/* =========================================================================================================================== */
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/* ================ Interrupt Number Definition ================ */
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/* =========================================================================================================================== */
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typedef
enum
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{
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/* ======================================= ARM Cortex-M0+ Specific Interrupt Numbers ======================================= */
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Reset_IRQn
= -15,
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NonMaskableInt_IRQn
= -14,
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HardFault_IRQn
= -13,
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SVCall_IRQn
= -5,
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PendSV_IRQn
= -2,
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SysTick_IRQn
= -1,
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/* =========================================== RP2040 Specific Interrupt Numbers =========================================== */
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TIMER_IRQ_0_IRQn
= 0,
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TIMER_IRQ_1_IRQn
= 1,
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TIMER_IRQ_2_IRQn
= 2,
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TIMER_IRQ_3_IRQn
= 3,
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PWM_IRQ_WRAP_IRQn
= 4,
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USBCTRL_IRQ_IRQn
= 5,
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XIP_IRQ_IRQn
= 6,
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PIO0_IRQ_0_IRQn
= 7,
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PIO0_IRQ_1_IRQn
= 8,
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PIO1_IRQ_0_IRQn
= 9,
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PIO1_IRQ_1_IRQn
= 10,
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DMA_IRQ_0_IRQn
= 11,
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DMA_IRQ_1_IRQn
= 12,
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IO_IRQ_BANK0_IRQn
= 13,
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IO_IRQ_QSPI_IRQn
= 14,
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SIO_IRQ_PROC0_IRQn
= 15,
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SIO_IRQ_PROC1_IRQn
= 16,
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CLOCKS_IRQ_IRQn
= 17,
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SPI0_IRQ_IRQn
= 18,
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SPI1_IRQ_IRQn
= 19,
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UART0_IRQ_IRQn
= 20,
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UART1_IRQ_IRQn
= 21,
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ADC_IRQ_FIFO_IRQn
= 22,
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I2C0_IRQ_IRQn
= 23,
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I2C1_IRQ_IRQn
= 24,
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RTC_IRQ_IRQn
= 25
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}
IRQn_Type
;
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/* =========================================================================================================================== */
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/* ================ Processor and Core Peripheral Section ================ */
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/* =========================================================================================================================== */
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/* ========================== Configuration of the ARM Cortex-M0+ Processor and Core Peripherals =========================== */
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#define __CM0PLUS_REV 0x0001U
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#define __NVIC_PRIO_BITS 2
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#define __Vendor_SysTickConfig 0
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#define __VTOR_PRESENT 1
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#define __MPU_PRESENT 1
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#define __FPU_PRESENT 0
/* End of group Configuration_of_CMSIS */
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#include "
core_cm0plus.h
"
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#include "
system_RP2040.h
"
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#ifndef __IM
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#define __IM __I
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#endif
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#ifndef __OM
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#define __OM __O
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#endif
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#ifndef __IOM
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#define __IOM __IO
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif
/* _CMSIS_RP2040_H */
IRQn_Type
IRQn_Type
Definition:
RP2040.h:41
PendSV_IRQn
@ PendSV_IRQn
Definition:
RP2040.h:47
PIO0_IRQ_1_IRQn
@ PIO0_IRQ_1_IRQn
Definition:
RP2040.h:58
DMA_IRQ_0_IRQn
@ DMA_IRQ_0_IRQn
Definition:
RP2040.h:61
PIO1_IRQ_1_IRQn
@ PIO1_IRQ_1_IRQn
Definition:
RP2040.h:60
I2C0_IRQ_IRQn
@ I2C0_IRQ_IRQn
Definition:
RP2040.h:73
ADC_IRQ_FIFO_IRQn
@ ADC_IRQ_FIFO_IRQn
Definition:
RP2040.h:72
SPI1_IRQ_IRQn
@ SPI1_IRQ_IRQn
Definition:
RP2040.h:69
SIO_IRQ_PROC0_IRQn
@ SIO_IRQ_PROC0_IRQn
Definition:
RP2040.h:65
XIP_IRQ_IRQn
@ XIP_IRQ_IRQn
Definition:
RP2040.h:56
DMA_IRQ_1_IRQn
@ DMA_IRQ_1_IRQn
Definition:
RP2040.h:62
SVCall_IRQn
@ SVCall_IRQn
Definition:
RP2040.h:46
SIO_IRQ_PROC1_IRQn
@ SIO_IRQ_PROC1_IRQn
Definition:
RP2040.h:66
Reset_IRQn
@ Reset_IRQn
Definition:
RP2040.h:43
TIMER_IRQ_1_IRQn
@ TIMER_IRQ_1_IRQn
Definition:
RP2040.h:51
PWM_IRQ_WRAP_IRQn
@ PWM_IRQ_WRAP_IRQn
Definition:
RP2040.h:54
TIMER_IRQ_3_IRQn
@ TIMER_IRQ_3_IRQn
Definition:
RP2040.h:53
SysTick_IRQn
@ SysTick_IRQn
Definition:
RP2040.h:48
UART0_IRQ_IRQn
@ UART0_IRQ_IRQn
Definition:
RP2040.h:70
PIO0_IRQ_0_IRQn
@ PIO0_IRQ_0_IRQn
Definition:
RP2040.h:57
SPI0_IRQ_IRQn
@ SPI0_IRQ_IRQn
Definition:
RP2040.h:68
UART1_IRQ_IRQn
@ UART1_IRQ_IRQn
Definition:
RP2040.h:71
PIO1_IRQ_0_IRQn
@ PIO1_IRQ_0_IRQn
Definition:
RP2040.h:59
HardFault_IRQn
@ HardFault_IRQn
Definition:
RP2040.h:45
I2C1_IRQ_IRQn
@ I2C1_IRQ_IRQn
Definition:
RP2040.h:74
RTC_IRQ_IRQn
@ RTC_IRQ_IRQn
Definition:
RP2040.h:75
TIMER_IRQ_2_IRQn
@ TIMER_IRQ_2_IRQn
Definition:
RP2040.h:52
USBCTRL_IRQ_IRQn
@ USBCTRL_IRQ_IRQn
Definition:
RP2040.h:55
CLOCKS_IRQ_IRQn
@ CLOCKS_IRQ_IRQn
Definition:
RP2040.h:67
IO_IRQ_QSPI_IRQn
@ IO_IRQ_QSPI_IRQn
Definition:
RP2040.h:64
NonMaskableInt_IRQn
@ NonMaskableInt_IRQn
Definition:
RP2040.h:44
IO_IRQ_BANK0_IRQn
@ IO_IRQ_BANK0_IRQn
Definition:
RP2040.h:63
TIMER_IRQ_0_IRQn
@ TIMER_IRQ_0_IRQn
Definition:
RP2040.h:50
core_cm0plus.h
CMSIS Cortex-M0+ Core Peripheral Access Layer Header File.
system_RP2040.h
CMSIS-Core(M) Device Peripheral Access Layer Header File for Device RP2040.