25#ifndef __CMSIS_ARMCC_H
26#define __CMSIS_ARMCC_H
29#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)
30 #error "Please use Arm Compiler Toolchain V4.0.677 or later!"
34#if ((defined (__TARGET_ARCH_6_M ) && (__TARGET_ARCH_6_M == 1)) || \
35 (defined (__TARGET_ARCH_6S_M ) && (__TARGET_ARCH_6S_M == 1)) )
36 #define __ARM_ARCH_6M__ 1
39#if (defined (__TARGET_ARCH_7_M ) && (__TARGET_ARCH_7_M == 1))
40 #define __ARM_ARCH_7M__ 1
43#if (defined (__TARGET_ARCH_7E_M) && (__TARGET_ARCH_7E_M == 1))
44 #define __ARM_ARCH_7EM__ 1
52#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
53 #define __ARM_FEATURE_DSP 1
61 #define __INLINE __inline
63#ifndef __STATIC_INLINE
64 #define __STATIC_INLINE static __inline
66#ifndef __STATIC_FORCEINLINE
67 #define __STATIC_FORCEINLINE static __forceinline
70 #define __NO_RETURN __declspec(noreturn)
73 #define __USED __attribute__((used))
76 #define __WEAK __attribute__((weak))
79 #define __PACKED __attribute__((packed))
81#ifndef __PACKED_STRUCT
82 #define __PACKED_STRUCT __packed struct
85 #define __PACKED_UNION __packed union
87#ifndef __UNALIGNED_UINT32
88 #define __UNALIGNED_UINT32(x) (*((__packed uint32_t *)(x)))
90#ifndef __UNALIGNED_UINT16_WRITE
91 #define __UNALIGNED_UINT16_WRITE(addr, val) ((*((__packed uint16_t *)(addr))) = (val))
93#ifndef __UNALIGNED_UINT16_READ
94 #define __UNALIGNED_UINT16_READ(addr) (*((const __packed uint16_t *)(addr)))
96#ifndef __UNALIGNED_UINT32_WRITE
97 #define __UNALIGNED_UINT32_WRITE(addr, val) ((*((__packed uint32_t *)(addr))) = (val))
99#ifndef __UNALIGNED_UINT32_READ
100 #define __UNALIGNED_UINT32_READ(addr) (*((const __packed uint32_t *)(addr)))
103 #define __ALIGNED(x) __attribute__((aligned(x)))
106 #define __RESTRICT __restrict
108#ifndef __COMPILER_BARRIER
109 #define __COMPILER_BARRIER() __memory_changed()
114#ifndef __PROGRAM_START
115#define __PROGRAM_START __main
119#define __INITIAL_SP Image$$ARM_LIB_STACK$$ZI$$Limit
123#define __STACK_LIMIT Image$$ARM_LIB_STACK$$ZI$$Base
126#ifndef __VECTOR_TABLE
127#define __VECTOR_TABLE __Vectors
130#ifndef __VECTOR_TABLE_ATTRIBUTE
131#define __VECTOR_TABLE_ATTRIBUTE __attribute__((used, section("RESET")))
162 register uint32_t __regControl __ASM(
"control");
163 return(__regControl);
174 register uint32_t __regControl __ASM(
"control");
175 __regControl = control;
186 register uint32_t __regIPSR __ASM(
"ipsr");
198 register uint32_t __regAPSR __ASM(
"apsr");
210 register uint32_t __regXPSR __ASM(
"xpsr");
222 register uint32_t __regProcessStackPointer __ASM(
"psp");
223 return(__regProcessStackPointer);
234 register uint32_t __regProcessStackPointer __ASM(
"psp");
235 __regProcessStackPointer = topOfProcStack;
246 register uint32_t __regMainStackPointer __ASM(
"msp");
247 return(__regMainStackPointer);
258 register uint32_t __regMainStackPointer __ASM(
"msp");
259 __regMainStackPointer = topOfMainStack;
270 register uint32_t __regPriMask __ASM(
"primask");
271 return(__regPriMask);
282 register uint32_t __regPriMask __ASM(
"primask");
283 __regPriMask = (priMask);
287#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
288 (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
295#define __enable_fault_irq __enable_fiq
303#define __disable_fault_irq __disable_fiq
311__STATIC_INLINE uint32_t __get_BASEPRI(
void)
313 register uint32_t __regBasePri __ASM(
"basepri");
314 return(__regBasePri);
323__STATIC_INLINE
void __set_BASEPRI(uint32_t basePri)
325 register uint32_t __regBasePri __ASM(
"basepri");
326 __regBasePri = (basePri & 0xFFU);
336__STATIC_INLINE
void __set_BASEPRI_MAX(uint32_t basePri)
338 register uint32_t __regBasePriMax __ASM(
"basepri_max");
339 __regBasePriMax = (basePri & 0xFFU);
348__STATIC_INLINE uint32_t __get_FAULTMASK(
void)
350 register uint32_t __regFaultMask __ASM(
"faultmask");
351 return(__regFaultMask);
360__STATIC_INLINE
void __set_FAULTMASK(uint32_t faultMask)
362 register uint32_t __regFaultMask __ASM(
"faultmask");
363 __regFaultMask = (faultMask & (uint32_t)1U);
377#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
378 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
379 register uint32_t __regfpscr __ASM(
"fpscr");
394#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
395 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
396 register uint32_t __regfpscr __ASM(
"fpscr");
397 __regfpscr = (fpscr);
448#define __ISB() __isb(0xF)
455#define __DSB() __dsb(0xF)
462#define __DMB() __dmb(0xF)
480#ifndef __NO_EMBEDDED_ASM
481__attribute__((section(
".rev16_text"))) __STATIC_INLINE __ASM uint32_t
__REV16(uint32_t value)
495#ifndef __NO_EMBEDDED_ASM
496__attribute__((section(
".revsh_text"))) __STATIC_INLINE __ASM int16_t
__REVSH(int16_t value)
521#define __BKPT(value) __breakpoint(value)
530#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
531 (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
532 #define __RBIT __rbit
534__attribute__((always_inline)) __STATIC_INLINE uint32_t
__RBIT(uint32_t value)
537 uint32_t s = (4U * 8U) - 1U;
540 for (value >>= 1U; value != 0U; value >>= 1U)
543 result |= value & 1U;
561#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
562 (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
570#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
571 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
573 #define __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop")
583#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
584 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
586 #define __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop")
596#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
597 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
599 #define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop")
611#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
612 #define __STREXB(value, ptr) __strex(value, ptr)
614 #define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
626#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
627 #define __STREXH(value, ptr) __strex(value, ptr)
629 #define __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
641#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
642 #define __STREXW(value, ptr) __strex(value, ptr)
644 #define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
652#define __CLREX __clrex
682#ifndef __NO_EMBEDDED_ASM
683__attribute__((section(
".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
697#define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
706#define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
715#define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
724#define __STRBT(value, ptr) __strt(value, ptr)
733#define __STRHT(value, ptr) __strt(value, ptr)
742#define __STRT(value, ptr) __strt(value, ptr)
754__attribute__((always_inline)) __STATIC_INLINE int32_t
__SSAT(int32_t val, uint32_t sat)
756 if ((sat >= 1U) && (sat <= 32U))
758 const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
759 const int32_t min = -1 - max ;
779__attribute__((always_inline)) __STATIC_INLINE uint32_t
__USAT(int32_t val, uint32_t sat)
783 const uint32_t max = ((1U << sat) - 1U);
784 if (val > (int32_t)max)
793 return (uint32_t)val;
808#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
810#define __SADD8 __sadd8
811#define __QADD8 __qadd8
812#define __SHADD8 __shadd8
813#define __UADD8 __uadd8
814#define __UQADD8 __uqadd8
815#define __UHADD8 __uhadd8
816#define __SSUB8 __ssub8
817#define __QSUB8 __qsub8
818#define __SHSUB8 __shsub8
819#define __USUB8 __usub8
820#define __UQSUB8 __uqsub8
821#define __UHSUB8 __uhsub8
822#define __SADD16 __sadd16
823#define __QADD16 __qadd16
824#define __SHADD16 __shadd16
825#define __UADD16 __uadd16
826#define __UQADD16 __uqadd16
827#define __UHADD16 __uhadd16
828#define __SSUB16 __ssub16
829#define __QSUB16 __qsub16
830#define __SHSUB16 __shsub16
831#define __USUB16 __usub16
832#define __UQSUB16 __uqsub16
833#define __UHSUB16 __uhsub16
836#define __SHASX __shasx
838#define __UQASX __uqasx
839#define __UHASX __uhasx
842#define __SHSAX __shsax
844#define __UQSAX __uqsax
845#define __UHSAX __uhsax
846#define __USAD8 __usad8
847#define __USADA8 __usada8
848#define __SSAT16 __ssat16
849#define __USAT16 __usat16
850#define __UXTB16 __uxtb16
851#define __UXTAB16 __uxtab16
852#define __SXTB16 __sxtb16
853#define __SXTAB16 __sxtab16
854#define __SMUAD __smuad
855#define __SMUADX __smuadx
856#define __SMLAD __smlad
857#define __SMLADX __smladx
858#define __SMLALD __smlald
859#define __SMLALDX __smlaldx
860#define __SMUSD __smusd
861#define __SMUSDX __smusdx
862#define __SMLSD __smlsd
863#define __SMLSDX __smlsdx
864#define __SMLSLD __smlsld
865#define __SMLSLDX __smlsldx
870#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
871 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
873#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
874 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
876#define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
877 ((int64_t)(ARG3) << 32U) ) >> 32U))
879#define __SXTB16_RORn(ARG1, ARG2) __SXTB16(__ROR(ARG1, ARG2))
static __inline __asm int16_t __REVSH(int16_t value)
Reverse byte order (16 bit)
Definition: cmsis_armcc.h:496
static __inline uint32_t __USAT(int32_t val, uint32_t sat)
Unsigned Saturate.
Definition: cmsis_armcc.h:779
static __inline uint32_t __RBIT(uint32_t value)
Reverse bit order of value.
Definition: cmsis_armcc.h:534
static __inline __asm uint32_t __REV16(uint32_t value)
Reverse byte order (16 bit)
Definition: cmsis_armcc.h:481
static __inline int32_t __SSAT(int32_t val, uint32_t sat)
Signed Saturate.
Definition: cmsis_armcc.h:754
static __inline uint32_t __get_xPSR(void)
Get xPSR Register.
Definition: cmsis_armcc.h:208
static __inline uint32_t __get_FPSCR(void)
Get FPSCR.
Definition: cmsis_armcc.h:375
static __inline uint32_t __get_PSP(void)
Get Process Stack Pointer.
Definition: cmsis_armcc.h:220
static __inline void __set_CONTROL(uint32_t control)
Set Control Register.
Definition: cmsis_armcc.h:172
static __inline uint32_t __get_MSP(void)
Get Main Stack Pointer.
Definition: cmsis_armcc.h:244
static __inline uint32_t __get_CONTROL(void)
Enable IRQ Interrupts.
Definition: cmsis_armcc.h:160
static __inline void __set_MSP(uint32_t topOfMainStack)
Set Main Stack Pointer.
Definition: cmsis_armcc.h:256
static __inline void __set_FPSCR(uint32_t fpscr)
Set FPSCR.
Definition: cmsis_armcc.h:392
static __inline uint32_t __get_PRIMASK(void)
Get Priority Mask.
Definition: cmsis_armcc.h:268
static __inline uint32_t __get_IPSR(void)
Get IPSR Register.
Definition: cmsis_armcc.h:184
static __inline uint32_t __get_APSR(void)
Get APSR Register.
Definition: cmsis_armcc.h:196
static __inline void __set_PRIMASK(uint32_t priMask)
Set Priority Mask.
Definition: cmsis_armcc.h:280
static __inline void __set_PSP(uint32_t topOfProcStack)
Set Process Stack Pointer.
Definition: cmsis_armcc.h:232