Processor feature enumeration.
Fields
FLOATING_POINT_PRECISION_ERRATA = 0,
On a Pentium, a floating-point precision error can occur in rare circumstances.
FLOATING_POINT_EMULATED = 1,
Floating-point operations are emulated using software emulator. This function returns a nonzero value if floating-point operations are emulated; otherwise, it returns zero.
COMPARE_EXCHANGE_DOUBLE = 2,
The atomic compare and exchange operation (cmpxchg) is available.
MMX_INSTRUCTIONS_AVAILABLE = 3,
The MMX instruction set is available.
PPC_MOVEMEM_64BIT_OK = 4,
ALPHA_BYTE_INSTRUCTIONS = 5,
XMMI_INSTRUCTIONS_AVAILABLE = 6,
The SSE instruction set is available.
3DNOW_INSTRUCTIONS_AVAILABLE = 7,
The 3D-Now instruction is available.
RDTSC_INSTRUCTION_AVAILABLE = 8,
The RDTSC instruction is available.
PAE_ENABLED = 9,
The processor is PAE-enabled.
XMMI64_INSTRUCTIONS_AVAILABLE = 10,
The SSE2 instruction set is available.
SSE_DAZ_MODE_AVAILABLE = 11,
NX_ENABLED = 12,
Data execution prevention is enabled.
SSE3_INSTRUCTIONS_AVAILABLE = 13,
The SSE3 instruction set is available.
COMPARE_EXCHANGE128 = 14,
The atomic compare and exchange 128-bit operation (cmpxchg16b) is available.
COMPARE64_EXCHANGE128 = 15,
The atomic compare 64 and exchange 128-bit operation (cmp8xchg16) is available.
CHANNELS_ENABLED = 16,
The processor channels are enabled.
XSAVE_ENABLED = 17,
The processor implements the XSAVI and XRSTOR instructions.
ARM_VFP_32_REGISTERS_AVAILABLE = 18,
The VFP/Neon: 32 x 64bit register bank is present. This flag has the same meaning as PF_ARM_VFP_EXTENDED_REGISTERS.
ARM_NEON_INSTRUCTIONS_AVAILABLE = 19,
This ARM processor implements the ARM v8 NEON instruction set.
SECOND_LEVEL_ADDRESS_TRANSLATION = 20,
Second Level Address Translation is supported by the hardware.
VIRT_FIRMWARE_ENABLED = 21,
Virtualization is enabled in the firmware and made available by the operating system.
RDWRFSGBASE_AVAILABLE = 22,
RDFSBASE, RDGSBASE, WRFSBASE, and WRGSBASE instructions are available.
FASTFAIL_AVAILABLE = 23,
_fastfail() is available.
ARM_DIVIDE_INSTRUCTION_AVAILABLE = 24,
The divide instruction_available.
ARM_64BIT_LOADSTORE_ATOMIC = 25,
The 64-bit load/store atomic instructions are available.
ARM_EXTERNAL_CACHE_AVAILABLE = 26,
The external cache is available.
ARM_FMAC_INSTRUCTIONS_AVAILABLE = 27,
The floating-point multiply-accumulate instruction is available.
RDRAND_INSTRUCTION_AVAILABLE = 28,
ARM_V8_INSTRUCTIONS_AVAILABLE = 29,
This ARM processor implements the ARM v8 instructions set.
ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE = 30,
This ARM processor implements the ARM v8 extra cryptographic instructions (i.e., AES, SHA1 and SHA2).
ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE = 31,
This ARM processor implements the ARM v8 extra CRC32 instructions.
RDTSCP_INSTRUCTION_AVAILABLE = 32,
RDPID_INSTRUCTION_AVAILABLE = 33,
ARM_V81_ATOMIC_INSTRUCTIONS_AVAILABLE = 34,
This ARM processor implements the ARM v8.1 atomic instructions (e.g., CAS, SWP).
MONITORX_INSTRUCTION_AVAILABLE = 35,
SSSE3_INSTRUCTIONS_AVAILABLE = 36,
The SSSE3 instruction set is available.
SSE4_1_INSTRUCTIONS_AVAILABLE = 37,
The SSE4_1 instruction set is available.
SSE4_2_INSTRUCTIONS_AVAILABLE = 38,
The SSE4_2 instruction set is available.
AVX_INSTRUCTIONS_AVAILABLE = 39,
The AVX instruction set is available.
AVX2_INSTRUCTIONS_AVAILABLE = 40,
The AVX2 instruction set is available.
AVX512F_INSTRUCTIONS_AVAILABLE = 41,
The AVX512F instruction set is available.
ERMS_AVAILABLE = 42,
ARM_V82_DP_INSTRUCTIONS_AVAILABLE = 43,
This ARM processor implements the ARM v8.2 Dot Product (DP) instructions.
ARM_V83_JSCVT_INSTRUCTIONS_AVAILABLE = 44,
This ARM processor implements the ARM v8.3 JavaScript conversion (JSCVT) instructions.